AMD 2003 Annual Report Download - page 14

Table of Contents
manufacturing Spansion Flash memory products. In December 2002, we executed an agreement with IBM to jointly develop new logic process technologies,
particularly 65- and 45-nanometer technologies to be implemented on 300-millimeter silicon wafers, for use in producing future high-performance
microprocessor products. The joint development agreement terminates on December 31, 2005 and may be extended by the mutual agreement of the parties. The
agreement can also be terminated immediately by either party if the other party permanently ceases doing business, becomes bankrupt or insolvent, liquidates or
undergoes a change of control, or terminated upon 30 days written notice upon a failure to perform a material obligation thereunder. The new process
technologies are being developed at an IBM facility in New York and are aimed at improving microprocessor performance and reducing power consumption.
The new process technologies will be based on advanced structures and materials such as high-speed SOI transistors, copper interconnects and improved “low-k
dielectric” insulation. During 2002 and 2003, we paid approximately $190 million to IBM in connection with agreements and services related to research and
development activities. In addition, in December 2003, we entered into license and consulting services agreements with IBM pursuant to which we licensed
technology and know-how developed by IBM in connection with manufacturing products on 300-millimeter silicon wafers. In addition, some development work
for logic process technologies took place at Fab 30. Research and development with respect to non-volatile memory technology used for manufacturing Spansion
Flash memory products is conducted primarily at FASL LLC’s SDC facility located in Sunnyvale, California and at its facilities in Japan. Currently, FASL LLC
is developing new non-volatile memory process technology, including 90-nanometer floating gate technology and 90-nanometer MirrorBit technology utilizing
three-layer copper interconnect.
Our expenses for research and development were $852 million in 2003, $816 million in 2002, and $651 million in 2001. These expenses represented 24
percent of consolidated net sales in 2003, 30 percent of consolidated net sales in 2002, and 17 percent of consolidated net sales in 2001.
As of year-end 2003, all of our microprocessors were manufactured using our 130-nanometer process technology on 200-millimeter wafers at Fab 30. In
2004, we expect to convert our microprocessor manufacturing to primarily 90-nanometer process technology. We believe that use of 90-nanometer technology
will allow us to provide products that are higher performing, use less power, and that cost less to manufacture.
In November 2003, we announced our intention to construct and facilitize a 300-millimeter wafer fabrication facility, Fab 36. Fab 36 will be owned by a
newly created partnership named AMD Fab 36 Limited Liability Company & Co. KG, or AMD Fab 36, and will be located in Dresden, Germany, adjacent to
Fab 30. We control the management of AMD Fab 36 through a wholly owned Delaware subsidiary, AMD Fab 36 LLC, which is a general partner of AMD Fab
36. We expect that Fab 36 will produce future generations of our microprocessor products, and that it will be in volume production in 2006. We believe using
300-millimeter wafers will decrease the manufacturing costs for certain of our microprocessor products and increase our capacity for producing these products
because it allows us to produce more equivalent chips per wafer than 200-millimeter wafers.
FASL LLC’s Flash memory device production at year-end 2003 was on 130-, 170-, 230- and 320-nanometer process technologies. During 2004, FASL
LLC intends to transition some of its Flash memory devices to production on 110-nanometer process technology with the goal that by the end of 2004, Fab 25
and JV3 will employ mostly 110-nanometer technology. In addition, we believe that the demand for our Flash memory products will increase in 2004. Therefore,
FASL LLC intends to increase manufacturing capacity at its wafer fabrication facilities.
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Source: ADVANCED MICRO DEVIC, 10-K, March 09, 2004