AMD 2006 Annual Report Download - page 21

Table of Contents
Canada, India, Finland and China. Due to the rapid pace of technological change in the graphics industry, our strategy is to focus on developing the newest
generation of products that meet market and customer requirements on a timely basis so as to meet each market window.
Manufacturing, Assembly and Test Facilities
We own and operate five manufacturing facilities, of which two are microprocessor wafer fabrication facilities and three are microprocessor assembly and
test facilities. We developed an approach to manufacturing called Automated Precision Manufacturing, or APM. APM comprises a suite of automation,
optimization and real-time data analysis technologies which automate the way decisions are made within our fabrication facilities. We use APM during process
technology transitions, and believe APM enables greater efficiency, higher baseline yields, better binning and faster yield learning.
Our microprocessor manufacturing is conducted at the facilities described in the chart below. These facilities are the cornerstone of our flexible capacity
growth plan, which focuses on bringing the right amount of capacity online at the right time through ongoing, incremental increases in total output.
Facility Location
Wafer Size
(diameter in
millimeters)
Principal
Production
Technology
(in nanometers)
Approximate
Clean Room
Square
Footage
Dresden, Germany
Fab 30 200 90 150,000
Fab 36 300 90/65 140,000
During 2006, we manufactured our microprocessor products at Fab 30 and Fab 36 primarily on 90-nanometer process technology. In December 2006, we
began manufacturing using 65-nanometer technology at Fab 36. Our goal is to have substantially all of the wafers out of Fab 36 being manufactured on
65-nanometer technology by mid-2007 and to begin manufacturing using 45-nanometer technology in mid-2008.
In May 2006, we announced plans to significantly expand our 300-millimeter manufacturing capacity in Dresden, Germany. The expansion includes the
conversion of Fab 30 from manufacturing on 200-millimeter wafers to 300-millimeter wafers, capacity expansion in Fab 36, and the addition of a new facility to
support bump and test activities. Bump and test is the final stage of the manufacturing process in which wafers are prepared for assembly and test.
We anticipate that after being converted to a 300-millimeters facility, Fab 30 will be able to handle approximately up to 20,000 300-millimeter wafer starts
per month. We intend to begin to decrease 200-millimeter production at Fab 30 in mid 2007, and to bring up 300-millimeter production in early 2008. Use of
300-millimeter wafers can contribute to decreasing manufacturing costs per unit and helps increase capacity by yielding significantly more chips per wafer than
200-millimeter wafers. Use of smaller process geometries allows us to put more transistors on an equivalent size chip, which can result in products that are higher
performing, use less power and/or cost less to manufacture.
Another facet of our flexible capacity growth strategy involves working with third-party foundries, and to this end, we have sourcing and manufacturing
technology agreements with Chartered Semiconductor Manufacturing pursuant to which Chartered is an additional manufacturing source for our AMD64-based
microprocessors. In June 2006, we began our first revenue shipments of microprocessors manufactured at Chartered. We also have foundry arrangements with
third parties for the production of our embedded processors, graphics and chipset products and products for consumer electronics devices.
In anticipation of the potential need for increased manufacturing capacity over the longer term, on December 22, 2006, we entered into a Grant
Disbursement Agreement with the New York State Urban
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Source: ADVANCED MICRO DEVIC, 10-K, March 01, 2007