AMD 2006 Annual Report Download - page 175

EXECUTION VERSION
“High Performance Device Information” means Background Know-How and Specific Results pertaining to all process methods, steps, and structures created on
substrates, not including *** or ***.
“High Performance Integrated Circuit” means an Integrated Circuit manufactured in a 32nm, 22nm or subsequent node CMOS semiconductor manufacturing
process using High Performance Device Information.
“High Sensitivity Pre-T0 Information” shall have the meaning ascribed to it in Section 8.18.
“IBM Bump Technology Project Leader” means the individual appointed by IBM pursuant to section 4.4 below.
“IBM Development Facilities” means the (i) IBM 200mm or 300mm wafer process development facility used for conducting the Process Development Projects;
(ii) the IBM Thomas J. Watson Research Center: and (iii) any other IBM facilities agreed to by the Parties in writing.
“IBM Pre-T0 Activities” means the activities conducted by IBM on the CMOS 13S, CMOS 13S2 and CMOS 14S logic fabrication processes researched and
evaluated for feasibility by IBM prior to the Commencement Date.
“IBM Pre-T0 Information” means all information and items developed or acquired by IBM pursuant to the IBM Pre-T0 Activities and delivered by IBM, in its
sole discretion, to the Pre-T0 Activities.
“IBM Pre-T0 Project Leader” means the individual appointed by IBM pursuant to Section 4.3, below, to provide day-to-day oversight for the Pre-T0 Activities.
“IBM Project Leader” means the individual appointed by IBM pursuant to Section 4.5, below, to provide day-to-day oversight for the Process Development
Projects.
“IBM Pre-T0 Steering Committee Member” means the individual appointed by IBM pursuant to Section 4.2, below, to provide technical guidance to the
Management Committee for the Pre-T0 Activities.
“Industry Standard CMOS” means a 32nm, 22nm or subsequent node CMOS semiconductor manufacturing process for high volume foundry manufacturing of
Semiconductor Products *** whose price and performance characteristics are similar to ***.
“Industry Standard Information” means those aspects of Background Know-How and Specific Results that are (i) directed to Lithography and BEOL, or
(ii) applicable to Industry Standard CMOS and selected by IBM either for incorporation into an IBM Industry Standard CMOS process or otherwise selected
pursuant to Section 3.4. For the avoidance of doubt, Industry Standard Information shall not include any eDRAM Technology derived from or used in CMOS
13SeD.
***Confidential Treatment Requested.
Third Amendment and Restatement of “S” Process Development Agreement between AMD and IBM
IBM - AMD Confidential Page 7 of 90
Source: ADVANCED MICRO DEVIC, 10-K, March 01, 2007