AMD 2006 Annual Report Download - page 179

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EXECUTION VERSION
“Silicon-On-Insulator Wafer” orSOI Wafer” shall mean a, single-crystal silicon wafer bearing a horizontally-disposed isolating silicon dioxide (SiO2) layer, in
turn bearing a single-crystal silicon layer or a polysilicon layer, which is separated from the underlying silicon by the silicon dioxide layer and in which one or
more active or passive integrated circuit structures are formed.
“SOI Device Information” means Background Know-How and Specific Results pertaining to all process methods, steps, and structures created on commercially
available SOI Wafers other than Bulk CMOS or Industry Standard Information.
“SOI Integrated Circuit” shall mean an Integrated Circuit fabricated utilizing SOI Device Information and built on SOI Wafers.
“Specific Results” shall mean information and items, other than i) Proprietary Tools, ii) Packaging Technology, iii) Mask Fabrication and Photoresist
Technology, iv) Stand Alone Memory, v) SiGe Technology, vi) Chip Designs, and vii) Post-Silicon Devices, developed and/or contributed to the Process
Development Projects by the Parties pursuant to the development work of the Process Development Projects as follows:
The documentation produced for the Process Development Projects as set forth in Exhibit J attached hereto (“Documentation”);
All information and items resulting from the Process Development Projects and results of the Pre-T0 Activities selected by the Management Committee
for inclusion in the CMOS 13S, CMOS 13S2 or CMOS 14S process, including but not limited to methods, techniques, unit processes, process flows,
structures in silicon, test software, and specifications for equipment, chemicals, masks and consumables;
Any Background Know-How provided to the Process Development Project(s) by a Party pursuant to Section 3, below.
“Stand Alone Memory” means Chip Designs and fabrication processes specifically related to read only memory (ROM), dynamic random access memory
(DRAM), programmable ROMs, magnetic RAM (MRAM), and ferroelectric RAM. For the avoidance of doubt, “Stand Alone Memory” shall not include static
RAM (SRAM) macros utilized in the Process Development Projects as test vehicles or elements of eDRAM Technology which are included in Specific Results.
“Subsidiary” means a corporation, company or other entity:
(a) more than fifty percent (50%) of whose outstanding shares or securities (representing the right to vote for the election of directors or other managing
authority) are, now or hereafter, owned or controlled, directly or indirectly, by a Party hereto, or
(b) which does not have outstanding shares or securities, as may be the case in a partnership, joint venture or unincorporated association, but more than
fifty percent
Third Amendment and Restatement of “S” Process Development Agreement between AMD and IBM
IBM - AMD Confidential Page 11 of 90
Source: ADVANCED MICRO DEVIC, 10-K, March 01, 2007