AMD 2006 Annual Report Download - page 176

EXECUTION VERSION
“Integrated Circuit” means an integral unit formed on a semiconductor substrate including a plurality of active and/or passive circuit elements formed at least in
part of semiconductor material. For clarity, “Integrated Circuit” shall include charge-coupled devices (“CCDs”).
“Invention” means any invention, discovery, design or improvement, conceived or first actually reduced to practice solely or jointly by one or more
Representatives of one or more of the Parties or their respective contractors during the term of this Agreement and in the performance of the Process
Development Projects.
“Licensed Product” means Integrated Circuits that include Bulk CMOS Information, Industry Standard Information, High Performance Device Information
(excluding eDRAM Technology), SOI Device Information (excluding eDRAM Technology), or any combination thereof, other than Foundry Products.
“Lithography” shall mean those aspects of Background Know-How and Specific Results directed to (a) process technology-dependent ground rules or process
technology-dependent special rules for shapes replication as developed by the Parties for the generation of photomasks used for development and qualification of
a semiconductor process technology in the Process Development Projects, (b) resolution enhancement techniques specifically created pursuant to the Process
Development Projects to generate mask build data, (c) such photomasks themselves and the data files used therefor as are used in the Process Development
Projects, (d) lithography process sequence as utilized in the Process Development Projects, and (e) mask data generation sequence as utilized in the Process
Development Projects.
“Management Committee” shall have the meaning ascribed to it in Section 4.1.
“Mask Fabrication and Photoresist Technology” shall mean any process, procedure, Proprietary Tools (e.g. the Niagara software developed by IBM), or
hardware tool used in the fabrication of photomasks, as well as the photomasks themselves, and/or the formulation and/or manufacture of photoresist; provided,
however, that “Mask Fabrication and Photoresist Technology” shall not include Lithography or the evaluation of photomasks or photoresists for use in the
technologies developed and researched hereunder.
“Net Selling Price” for each unit of a particular ASIC Product or wafers (only pursuant to Section 5.7) means the net revenue recorded by AMD (including
Wholly Owned Subsidiaries and Related Subsidiaries of AMD) with respect to an ASIC Product or such wafers (only pursuant to Section 5.7) less (a) shipping,
(b) insurance, and (c) sales, value added, use or excise taxes, to the extent to which they are actually paid or allowed, and less allowances to the extent they are
actually allowed. If ASIC Products or such wafers (only pursuant to Section 5.7) are sold, leased or otherwise transferred in a higher level of assembly or in the
course of a transaction that includes other products or services with no separate bona fide price to be charged for the ASIC Products, the applicable Net Selling
Price for the purpose of calculating royalties shall be the fair market value of the ASIC Product or such wafers (only pursuant to Section 5.7), but no less than the
average Net Selling Price of all such units of other ASIC Products or such wafers (only pursuant to Section 5.7) sold, leased, or otherwise transferred to a Third
Party by AMD (and/or by Wholly Owned Subsidiaries and Related Subsidiaries of AMD), whichever the case may be, during the preceding half year.
Third Amendment and Restatement of “S” Process Development Agreement between AMD and IBM
IBM - AMD Confidential Page 8 of 90
Source: ADVANCED MICRO DEVIC, 10-K, March 01, 2007