AMD 2007 Annual Report Download - page 21

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Table of Contents
We conduct research and development activities for our graphics products, chipset products and products for consumer electronics devices at design
centers located throughout the world, including in the United States, Canada, India, Finland and China. Due to the rapid pace of technological change in the
graphics industry, our strategy is to focus on developing the newest generation of products that meet market and customer requirements on a timely basis so as to
meet each market window.
Manufacturing, Assembly and Test Facilities
We own and operate five manufacturing facilities, of which two are microprocessor wafer fabrication facilities and three are microprocessor assembly and
test facilities. We developed an approach to manufacturing called Automated Precision Manufacturing, or APM. APM comprises a suite of automation,
optimization and real-time data analysis technologies which automate the way decisions are made within our fabrication facilities. We use APM during volume
manufacturing and process technology transitions, and believe APM enables greater efficiency, higher baseline yields, better speed binning and faster yield
learning. We have complemented APM with a program called ADVANCE, which is based on “Lean” manufacturing principles (originating principally from the
automotive industry), and helps to identify and institutionalize efficiency and productivity gains.
During 2007, our microprocessor manufacturing was conducted at the facilities described in the chart below. These facilities are the cornerstone of our
flexible capacity growth plan, which focuses on bringing the right amount of capacity online at the right time through ongoing, incremental increases in total
output.
Facility Location
Wafer Size
(diameter in
millimeters)
Principal
Production
Technology
(in nanometers)
Approximate
Clean Room
Square
Footage
Dresden, Germany
Fab 30 200 90 263,000
Fab 36 300 65 150,000
During 2007, we manufactured our microprocessor products at Fab 30 primarily on 90-nanometer process technology. We fully converted to and ramped
production on 65-nanometer process technology at Fab 36 by mid-2007, as planned. Our goal is to ramp manufacturing using 45-nanometer technology in the
first half of 2008.
In 2007, we expanded capacity in Fab 36, and completed the addition of a new bump and test facility. Bump and test is the final stage of the wafer
manufacturing process in which wafers are prepared for assembly and final test. We also began the process of converting Fab 30 from a 200-millimeter to a
300-millimeter manufacturing facility. The last 200-millimeter wafer in Fab 30 was completed in November 2007.
We anticipate that after being fully converted to a 300-millimeter facility, Fab 30 (which will be renamed Fab 38) will be able to handle a maximum of
approximately 20,000 300-millimeter wafer starts per month.
Another facet of our flexible capacity growth strategy involves working with third-party foundries, and to this end, we have sourcing and manufacturing
technology agreements with Chartered Semiconductor Manufacturing pursuant to which Chartered is an additional manufacturing source for our AMD64-based
microprocessors. We also have foundry arrangements with third parties for the production of our embedded processors, chipset products and graphics products
and products for consumer electronics devices.
In connection with our potential new 300-millimeter wafer fabrication facility on the Luther Forest Technology Campus in Saratoga County, New York,
we may give notice to the State of New York Urban Development Corporation d/b/a Empire State Development Corporation (ESDC) to proceed with this project
anytime between January 2008 and July 2009. However, we are not obligated to commence construction, and our decision regarding proceeding with the
construction is dependent on business conditions and market demand.
16
Source: ADVANCED MICRO DEVIC, 10-K, February 26, 2008