AMD 2002 Annual Report Download - page 291
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EXHIBIT J
DOCUMENTATION
Wafer Process And Characterization Documentation
Process routing
Process of Record (POR)
- Process change history
Process assumptions
Process engineering specifications
Unit process descriptions and characterization (rate, uniformity, selectivity, particle, etc.)
Process recipes for critical unit processes
Specification Sheets for critical dimensions, overlay
ED analysis data of critical layers (litho process widow)
Cp/Cpk for critical measurements
List of critical tools including QC tools
Critical Equipment specifications
- Critical maintenance procedures
TEM Cross Sections (both center and edge)
Finished wafer: STI, GC, CS, LI, Interconnect spacer edge, LI bottom on STI, CS bottom, Via bottom
In Line wafer: After GC etch, after spacer-1 etch, after spacer-2 etch, after CS etch, after V2 etch, after M2 etch
Tool control/monitor data for critical tools
Material Specifications for critical materials
Defect Catalog
SOI Wafer Specification
Bill Of Materials For wafers
SIMS data (as available)
Device design and modeling:
- SOI device model
- Parameter extraction
- AC Performance Verification
- Tolerance data
- Compact model
Source: ADVANCED MICRO DEVIC, 10-K, March 14, 2003