AMD 2005 Annual Report Download - page 18

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Table of Contents
implemented on silicon wafers. Through this agreement, we expanded our alliance with IBM to also include laboratory-based research of emerging technologies
such as new transistor, interconnect, lithography and die-to-package connection technologies. Furthermore, if we jointly develop bump technology, which is the
technology associated with connecting an integrated circuit to a chip package, during the term of the agreement, these technologies will be licensed to us under
the terms of the agreement.
The agreement also extended the joint development relationship for an additional three years, from December 31, 2008 to December 31, 2011. However,
the continuation of capital purchases by IBM necessary for process development projects under the agreement past December 31, 2008 is conditioned upon the
approval of IBM’s board of directors. If IBM’s board of directors does not approve this agreement by September 30, 2007, either party has the right to terminate
the agreement effective December 31, 2008 without liability. In addition, the agreement may be extended further by the mutual agreement of the parties and can
also be terminated immediately by either party if the other party permanently ceases doing business, becomes bankrupt or insolvent, liquidates or undergoes a
change of control or can be terminated by either party upon 30 days written notice upon a failure of the other party to perform a material obligation thereunder.
Under this agreement, research and development takes place in IBM’s Watson Research Center in Yorktown Heights, New York, the Center for Semiconductor
Research at Albany NanoTech, and at IBM’s 300 millimeter manufacturing facility in East Fishkill, N.Y.
Under the agreement, we agreed to pay fees to IBM for joint development projects. The actual amounts to be paid to IBM are dependent upon the number
of partners, including us and IBM, engaged in related development projects under the agreement. The fees for the joint development projects are generally
payable on a quarterly basis over the term of the agreement. In addition, we agreed to pay IBM specified royalties upon the occurrence of certain events,
including in the event that we sublicense the jointly developed process technologies to certain third parties or if we bump wafers for a third party. For more
information on the fees paid or payable to IBM, see “Unconditional Purchase Commitments,” and “Risk Factors—We cannot be certain that our substantial
investments in research and development of process technologies will lead to timely improvements in technology and equipment used to fabricate our products or
that we will have sufficient resources to invest in the level of research and development that is required to remain competitive.”
Flash Memory
Product and system research and development activities for Spansion Flash memory products is conducted primarily in Sunnyvale, California and in
Japan, with additional design and development engineering teams located in the United States, Europe and Asia. Spansion’s primary development focus is on
products based on MirrorBit technology for the wireless and embedded business markets. Research and development activities related to process development
are conducted primarily at the Submicron Development Center in Sunnyvale, California, a manufacturing facility in Austin, Texas referred to as Fab 25 and at
facilities in Aizu-Wakamatsu, Japan. Spansion is focusing on developing new non-volatile memory process technologies and has announced plans for
development of 65-nanometer technology. Spansion is developing processes on 200-millimeter and 300-millimeter wafer technology. Spansion also participates
in alliances or other arrangements with external partners in the area of product technology and systems solutions.
13
Source: ADVANCED MICRO DEVIC, 10-K, February 27, 2006